MegEnta is our parallel/distributed
simulation execution infrastructure for the
simulation of models with very large number of
(on the order of a million) entities. Our design
of MegEnta consists of two distinct
modules:
- TiCOON --- A high-performance
general-purpose object-oriented parallel
simulation executive that is based on a
novel micro-kernel approach.
- HOPPERS --- A novel ultra
light-weight process abstraction which
also supports shared-memory semantics.
Together, the two modules will be able to
support the modeling and simulation of
large-scale models. A set of real-life
large-scale applications, such as PCS network
models, will be developed using the MegEnta
framework, and these applications will serve as
capability demonstrations.
TiCOON: Time Control--Open & On-line
TiCOON is a new object-oriented
parallel/distributed simulation executive that is
designed with the goals of scalability,
auto-configurability, extensibility and
portability. TiCOON is different from
other simulation executives in its approach to
extensibility and its federatability (ease of
interoperating in a federation of heterogeneous
simulation executives). Extensibility and
federatability are facilitated using a novel
micro-kernel approach to simulation process
management that is analogous to the concept of
micro-kernel operating systems (as opposed to
monolithic kernels).
TiCOON incorporates a ``Time Control''
mechanism that can simultaneously support
different synchronization schemes (such as
optimistic and conservative). It is ``Open'' in
the sense that it allows model-specific
optimizations and extensions, using
object-oriented techniques (inheritance and
polymorphism), while requiring no changes to the
executive proper. Object-orientation is used both
in the simulation API as well as in the
implementation of the executive. It is
``ON-line'' in the sense that it is federatable,
supports incorporation of GUIs and
visualizations, and is capable of both
interactive and batch-mode execution.
TiCOON incorporates several parallel
simulation features which are not only important
for achieving the goals of MegEnta, but
also have application outside the goals of this
project (for example, in efficiently supporting
multicast semantics in parallel simulation).
These features include
- efficient implementations of
``Read-only'' and ``Query'' event
abstractions
- addition of ``wide virtual time'' to
support application-defined ordering of
simultaneous events, facilitating
repeatability and fairness
- facilities for supporting prefetching
remote state, and for temporary blocking
of a logical simulation process.
HOPPERS: Dynamic, Ultra Light-weight
Processes
We have developed a novel concept called
``Hoppers'' (which we also refer to as ``Active
Events''). Hoppers are very light-weight
simulation processes that enable the simulation
of very large systems. The HOPPERS module
can be considered as a ``middle-ware'' that
supports the Hoppers abstraction, and the module
sits between the simulation executive (TiCOON)
and the application.
The Hopper concept attempts to support two
important desirable features for modeling and
simulation:
- A form of shared-memory semantics for
simulation object interaction
- Capability for the simulation of a large
number of (on the order of a million)
model entities.
Previous parallel simulation research focussed
primarily on two extremes, namely, pure
event-oriented interaction, and pure
process-oriented action. In contrast, our work on
HOPPERS attempts to find a middle ground
between the two extremes, capturing the
advantages and eliminating the problems of the
two.
Also, HOPPERS is different from
conventional shared-memory systems because new
issues arise due to optimistic processing in
optimistic-style simulation approaches, whereas
such issues are absent in general shared-memory
systems.
Summary
The design of MegEnta, consisting of TiCOON
and HOPPERS, is completed. We have also
started the implementation of TiCOON; the
work-in-progress currently runs on shared-memory
multiprocessors (SGI PowerChallenge, Sun
UltraSPARCs) and uniprocessors (Sun SPARCs, SGI
Indigos and DEC Alphas).
Publications
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