Simulations of integrated communications Systems

PI: Richard Fujimoto with other collaborators.
Students: Kalyan Perumalla, Fang Hao, Karen Wilson
Sponsor: National Science Foundation

This is a joint project including researchers at Bellcore, Bell Labs, University of Massachusetts, Rutgers, and Dartmouth.

This project is also closely related to the twin project named S3: Scalable Self-organized Simulations.

The goals of this project are to:

1. Develop a network description methodology, similar in spirit to VHDL (Very high speed integrated circuit hardware design language), suitable for the description of current and future telecommunication networks
2. Provide validated high-performance simulation software prototypes based on this methodology, and,
3. Demonstrate the use of the tools for network construction and operation problems that cannot be answered otherwise.

Toward this end, a simulator-independent specification language called TeD (Telecommunication Network Description language) has been developed, as well as a translator that converts TeD descriptions to parallel simulation software that executes on the Georgia Tech Time Warp (GTW) system. This makes parallelization transparent to network modelers. Research is focused on developing and evaluating optimization techniques for parallel discrete event simulation programs that will be embedded into the TeD translator.

Publications

(Includes related work prior to initiation of project)

• F. Hao, K. Wilson, R. M. Fujimoto, and E. Zegura ``Logical Process Size in Parallel ATM Simulations,'' 1996 Winter Simulation Conference, December 1996.
• K. Perumalla, C.A. Cooper, and R. M. Fujimoto, ``An Efficiency Prediction Method for ATM Multiplexers,'' Broadband Communications Conference, April 1996.
• R. M. Fujimoto, I. Nikolaidis, and A. C. Cooper, ``Parallel Simulation of Statistical Multiplexers,'' Discrete Event Dynamic Systems: Theory and Applications, pp. 115-140, April-July 1995.
• I. Nikolaidis and R. M. Fujimoto and A. Cooper ``Time-Parallel Simulation of Cascaded Statistical Multiplexers,'' 1994 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems, pp. 231-240, May 1994.
• I. Nikolaidis and R. M. Fujimoto and A. Cooper, ``Parallel Simulation of High-Speed Network Multiplexers,'' 32nd IEEE Conference on Decision and Control, Vol. 3, pp. 2224-2229, December 1993.